Instruction Set De nition and Instruction Selection for ASIPsJohan

Application Speciic Instruction set Processors (ASIPs) are eld or mask programmable processors of which the architecture and instruction set are opti-mised to a speciic application domain. ASIPs ooer a high degree of exibility and are therefore increasingly being used in competitive markets like telecommunications. However, adequate CAD techniques for the design and programming of ASIPs are missing hitherto. In this paper, an interactive approach for the deenition of optimised microinstruction sets of ASIPs is presented. A second issue is a method for instruction selection when generating code for a predeened ASIP. A combined instruction set and data-path model is generated, onto which the application is mapped. 1 Introduction Application Speciic Instruction set Processors (ASIPs) are in between custom architectures and commercial programmable DSP processors. They allow eld and mask programmability but are targeted to a certain class of applications as to limit the amount of hardware (area and power) needed. Consequently, ASIPs are often the best choice for embedded applications. To increase performance of such an ASIP, custom hardware accelerator data-path(s) can be added, which makes the ASIP a heterogeneous IC architecture 6]. The small number of algorithms to be mapped on an ASIP does not justify the eeort of writing a compiler for each target architecture. In practice, assembly code therefore is often written manually, which is too high a cost. The solution is a retargetable compiler , with as additional advantage that it supports late changes on the instruction set. This paper focusses on the instruction selection task in such a retargetable compiler. A second part of the paper shows how our instruction selection method can be used together with an application analysis tool for micro-instruction set deenition. The techniques are implemented as a part of the synthesis and code generation system \Chess". 2 Traditional instruction selection An ASIP is usually speciied by its instruction set and an abstract description of its data-path. The detailed description of the data-path with all connections is normally not available, nor is a description of the controller or micro-sequencing logic.